82801IBICH9 데이터 시트보기 (PDF) - Intel
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82801IBICH9 Datasheet PDF : 885 Pages
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10.1.71 SBEMC3—Scheduled Break Event C3 Exit Latency (Mobile Only).................. 382
10.1.72 SBEMC4—Scheduled Break Event C4 Exit Latency (Mobile Only).................. 383
10.1.73 RC—RTC Configuration Register .............................................................. 383
10.1.74 HPTC—High Precision Timer Configuration Register ................................... 384
10.1.75 GCS—General Control and Status Register ............................................... 385
10.1.76 BUC—Backed Up Control Register ........................................................... 387
10.1.77FD—Function Disable Register ................................................................ 388
10.1.78 CG—Clock Gating.................................................................................. 390
10.1.79 FDSW—Function Disable SUS Well .......................................................... 392
10.1.80CIR8—Chipset Initialization Register 8 ..................................................... 392
10.1.81CIR9—Chipset Initialization Register 9 ..................................................... 392
10.1.82 PPO - Port Power Off ............................................................................. 392
10.1.83 CIR10 - Chipset Initialization Register 10 ................................................. 393
10.1.84 MAP - Remap Control Register ................................................................ 393
11 PCI-to-PCI Bridge Registers (D30:F0).................................................................... 395
11.1 PCI Configuration Registers (D30:F0) ................................................................. 395
11.1.1 VID— Vendor Identification Register (PCI-PCI—D30:F0)............................. 396
11.1.2 DID— Device Identification Register (PCI-PCI—D30:F0) ............................. 396
11.1.3 PCICMD—PCI Command (PCI-PCI—D30:F0) ............................................. 397
11.1.4 PSTS—PCI Status Register (PCI-PCI—D30:F0) .......................................... 397
11.1.5 RID—Revision Identification Register (PCI-PCI—D30:F0) ............................ 399
11.1.6 CC—Class Code Register (PCI-PCI—D30:F0)............................................. 399
11.1.7 PMLT—Primary Master Latency Timer Register (PCI-PCI—D30:F0) ............... 400
11.1.8 HEADTYP—Header Type Register (PCI-PCI—D30:F0) ................................. 400
11.1.9 BNUM—Bus Number Register (PCI-PCI—D30:F0) ...................................... 400
11.1.10 SMLT—Secondary Master Latency Timer Register (PCI-PCI—D30:F0) ........... 401
11.1.11 IOBASE_LIMIT—I/O Base and Limit Register (PCI-PCI—D30:F0) ................. 401
11.1.12 SECSTS—Secondary Status Register (PCI-PCI—D30:F0) ............................ 402
11.1.13MEMBASE_LIMIT—Memory Base and Limit Register
(PCI-PCI—D30:F0)................................................................................ 403
11.1.14 PREF_MEM_BASE_LIMIT—Prefetchable Memory Base
and Limit Register (PCI-PCI—D30:F0) ..................................................... 403
11.1.15PMBU32—Prefetchable Memory Base Upper 32 Bits
Register (PCI-PCI—D30:F0) ................................................................... 404
11.1.16PMLU32—Prefetchable Memory Limit Upper 32 Bits
Register (PCI-PCI—D30:F0) ................................................................... 404
11.1.17CAPP—Capability List Pointer Register (PCI-PCI—D30:F0) .......................... 404
11.1.18INTR—Interrupt Information Register (PCI-PCI—D30:F0) ........................... 404
11.1.19 BCTRL—Bridge Control Register (PCI-PCI—D30:F0) ................................... 405
11.1.20 SPDH—Secondary PCI Device Hiding Register (PCI-PCI—D30:F0) ................ 406
11.1.21DTC—Delayed Transaction Control Register (PCI-PCI—D30:F0) ................... 407
11.1.22 BPS—Bridge Proprietary Status Register (PCI-PCI—D30:F0) ....................... 408
11.1.23 BPC—Bridge Policy Configuration Register (PCI-PCI—D30:F0) ..................... 409
11.1.24SVCAP—Subsystem Vendor Capability Register (PCI-PCI—D30:F0) .............. 410
11.1.25SVID—Subsystem Vendor IDs Register (PCI-PCI—D30:F0) ......................... 410
12 Gigabit LAN Configuration Registers ...................................................................... 411
12.1 Gigabit LAN Configuration Registers (Gigabit LAN — D25:F0)................................. 411
12.1.1 VID—Vendor Identification Register
(Gigabit LAN—D25:F0) .......................................................................... 412
12.1.2 DID—Device Identification Register
(Gigabit LAN—D25:F0) .......................................................................... 412
12.1.3 PCICMD—PCI Command Register
(Gigabit LAN—D25:F0) .......................................................................... 413
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Intel® I/O Controller Hub 9 (ICH9) Family Datasheet
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