82801IBICH9 데이터 시트보기 (PDF) - Intel

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82801IBICH9

Intel® I/O Controller Hub 9 (ICH9) Family

Intel 

12.2.2 LDR3—LAN Device Initialization Register 3

(Gigabit LAN Memory Mapped Base Address Register) ............................... 424

12.2.3 LDCR2—LAN Device Control Register 2

(Gigabit LAN Memory Mapped Base Address Register) ............................... 425

12.2.4 LDCR4—LAN Device Control Register 4

(Gigabit LAN Memory Mapped Base Address Register) ............................... 425

12.2.5 LDR5—LAN Device Control Register 5

(Gigabit LAN Memory Mapped Base Address Register) ............................... 425

12.2.6 LDR2—LAN Device Initialization Register 1

(Gigabit LAN Memory Mapped Base Address Register) ............................... 425

13 LPC Interface Bridge Registers (D31:F0) ............................................................... 427

13.1 PCI Configuration Registers (LPC I/F—D31:F0) .................................................... 427

13.1.1 VID—Vendor Identification Register (LPC I/F—D31:F0) .............................. 428

13.1.2 DID—Device Identification Register (LPC I/F—D31:F0)............................... 428

13.1.3 PCICMD—PCI COMMAND Register (LPC I/F—D31:F0)................................. 429

13.1.4 PCISTS—PCI Status Register (LPC I/F—D31:F0)........................................ 430

13.1.5 RID—Revision Identification Register (LPC I/F—D31:F0) ............................ 431

13.1.6 PI—Programming Interface Register (LPC I/F—D31:F0) ............................. 431

13.1.7 SCC—Sub Class Code Register (LPC I/F—D31:F0) ..................................... 431

13.1.8 BCC—Base Class Code Register (LPC I/F—D31:F0) .................................... 431

13.1.9 PLT—Primary Latency Timer Register (LPC I/F—D31:F0) ............................ 431

13.1.10 HEADTYP—Header Type Register (LPC I/F—D31:F0) .................................. 432

13.1.11SS—Sub System Identifiers Register (LPC I/F—D31:F0) ............................. 432

13.1.12CAPP—Capability List Pointer (LPC I/F—D31:F0) ....................................... 432

13.1.13PMBASE—ACPI Base Address Register (LPC I/F—D31:F0) ........................... 432

13.1.14ACPI_CNTL—ACPI Control Register (LPC I/F — D31:F0) ............................. 433

13.1.15 GPIOBASE—GPIO Base Address Register (LPC I/F — D31:F0) ..................... 434

13.1.16 GC—GPIO Control Register (LPC I/F — D31:F0) ........................................ 435

13.1.17PIRQ[n]_ROUT—PIRQ[A,B,C,D] Routing Control Register

(LPC I/F—D31:F0) ................................................................................ 436

13.1.18SIRQ_CNTL—Serial IRQ Control Register

(LPC I/F—D31:F0) ................................................................................ 437

13.1.19PIRQ[n]_ROUT—PIRQ[E,F,G,H] Routing Control Register

(LPC I/F—D31:F0) ................................................................................ 438

13.1.20LPC_IBDF—IOxAPIC Bus:Device:Function

(LPC I/F—D31:F0) ................................................................................ 439

13.1.21LPC_I/O_DEC—I/O Decode Ranges Register

(LPC I/F—D31:F0) ................................................................................ 439

13.1.22 LPC_EN—LPC I/F Enables Register (LPC I/F—D31:F0) ................................ 440

13.1.23GEN1_DEC—LPC I/F Generic Decode Range 1 Register

(LPC I/F—D31:F0) ................................................................................ 441

13.1.24GEN2_DEC—LPC I/F Generic Decode Range 2 Register

(LPC I/F—D31:F0) ................................................................................ 442

13.1.25GEN3_DEC—LPC I/F Generic Decode Range 3 Register

(LPC I/F—D31:F0) ................................................................................ 442

13.1.26GEN4_DEC—LPC I/F Generic Decode Range 4 Register

(LPC I/F—D31:F0) ................................................................................ 443

13.1.27FWH_SEL1—Firmware Hub Select 1 Register

(LPC I/F—D31:F0) ................................................................................ 444

13.1.28FWH_SEL2—Firmware Hub Select 2 Register

(LPC I/F—D31:F0) ................................................................................ 445

13.1.29FWH_DEC_EN1—Firmware Hub Decode Enable Register

(LPC I/F—D31:F0) ................................................................................ 445

13.1.30BIOS_CNTL—BIOS Control Register

(LPC I/F—D31:F0) ................................................................................ 449

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Intel® I/O Controller Hub 9 (ICH9) Family Datasheet

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