P83C180AER/001 데이터 시트보기 (PDF) - Philips Electronics

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P83C180AER/001

Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc.

Philips Electronics 

Philips Semiconductors

Microcontrollers for monitors with DDC

interface, auto-sync detection and sync proc.

Product specification

P83Cx80; P87C380

7.3.1 RAM BUFFER I/O INTERFACE REGISTER (RAMBUF)

RAMBUF is used as an I/O interface to the RAM buffer. If it is associated with the address pointer DDCADR which is

equipped with the capability of post increment, then it will be convenient to transfer the consecutive data stream. This

feature is useful to support the DDC/EDID data transfer.

Table 5 RAM Buffer I/O Interface Register (SFR address 9CH)

7

6

5

4

3

RAMBUF.7 RAMBUF.6 RAMBUF.5 RAMBUF.4 RAMBUF.3

2

RAMBUF.2

1

RAMBUF.1

0

RAMBUF.0

Table 6 Description of RAMBUF bits

BIT

7 to 0

SYMBOL

RAMBUF.7 to RAMBUF.0

DESCRIPTION

8-bit data which is read from or to be written into RAM buffer

7.3.2 MISCELLANEOUS CONTROL REGISTER (DFCON)

This register is bit-addressable.

Table 7 Miscellaneous Control Register (SFR address C0H)

7

6

5

4

3

EW2

SOGE

SYNCE

DDCE

S1E

2

ADCE

1

P14LVL

0

P8LVL

Table 8 Description of DFCON bits

BIT

SYMBOL

DESCRIPTION

7

EW2

Watchdog Timer enable flag. This flag is associated with the flags, EW1 (SFR

PWM10H) and EW0 in (SFR PWM10L) to form the enable/disable control key for the

Watchdog Timer (see Chapter 9). The Watchdog Timer is only disabled by

EW2 to EW0 = 101, else it is kept enabled for the rest of the combinations.

6

SOGE CSYNCin enable for pin CSYNCin/P1.6. If SOGE = 1, the pin function is CSYNCin. If

SOGE = 0, the pin function is I/O port P1.6.

5

SYNCE Sync separated signals output enable for pins VSYNCout/P1.4 and HSYNCout/P1.5.

If SYNCE = 1, the pins function as VSYNCout and HSYNCout respectively.

If SYNCE = 0, the pins function as I/O ports P1.4 and P1.5 respectively.

4

DDCE Enable for DDC interface pins SCL1/P1.2 and SDA1/P1.3. If DDCE = 1, the pins

function as SCL1 and SDA1 respectively for the DDC interface. If DDCE = 0, the pins

function as I/O ports P1.2 and P1.3 respectively.

3

S1E

Enable for I2C-bus interface pins SCL/P1.0 and SDA/P1.1. If S1E = 1, the pins

function as SCL and SDA respectively for the I2C-bus interface. If S1E = 0, the pins

function as I/O ports P1.0 and P1.1 respectively.

1997 Dec 12

13

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