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P83C180AER/001 데이터 시트보기 (PDF) - Philips Electronics

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P83C180AER/001 Datasheet PDF : 84 Pages
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Philips Semiconductors
Microcontrollers for monitors with DDC
interface, auto-sync detection and sync proc.
Product specification
P83Cx80; P87C380
7.3.6 PWM OUTPUT CONTROL REGISTER 2 (PWME2)
Table 17 PWM Output Control Register 2 (SFR address E8H)
7
PATENA
6
DACE3
5
DACE2
4
DACE1
3
DACE0
2
PWME2.2
1
PWME2.1
0
PWME2.0
Table 18 Description of PWME2 bits
BIT
SYMBOL
7
PATENA
6 to 3
DACE3 to DACE0
2 to 0
PWME2.2 to PWME2.0
DESCRIPTION
PATOUT (pattern output) enable. If PATENA = 1, the pin
PWM9/PATOUT/P3.1 is switched to the PATOUT (display test pattern)
output. If PATENA = 0, the PATOUT function is disabled. The PATOUT
function always overrides other alternative functions such as PWM9 and
P3.1.
DAC outputs enable (n = 3 to 0). If DACEn = 1, the corresponding
DACs: DAC3 to DAC0 are enabled. If DACEn = 0, the corresponding
DACs: DAC3 to DAC0 are disabled.
PWM outputs enable; n = 2 to 0. If PWME2.n = 1, the corresponding
PWMs: PWM8, PWM9 and PWM10, are enabled by PWME2.2,
PWME2.1 and PWME2.0 respectively and pins PWM8/CLAMP/P3.0,
PWM9/PATOUT/P3.1 and PWM10/P1.7 are switched to PWM output. If
PWME2.n = 0, the corresponding PWM is disabled. Pins
PWM8/CLAMP/P3.0, PWM9/PATOUT/P3.1 and PWM10/P1.7 are
switched to I/O port functions P3.0, P3.1 and P1.7 respectively.
7.3.7 DATA LATCHES FOR 8-BIT PWMS (PWM0 TO PWM9)
Table 19 Data Latches for 8-bit PWMs (n = 0 to 9; SFR address C9H to CFH and EDH to EFH)
7
PWMn.7
6
PWMn.6
5
PWMn.5
4
PWMn.4
3
PWMn.3
2
PWMn.2
1
PWMn.1
0
PWMn.0
Table 20 Description of PWM0 to PWM9 bits
BIT
7 to 0
SYMBOL
PWMn.7 to PWMn.0
DESCRIPTION
8-bit data for PWM channel n (n = 0 to 9)
1997 Dec 12
16

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