LC66354C 데이터 시트보기 (PDF) - SANYO -> Panasonic
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LC66354C Datasheet PDF : 21 Pages
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LC66354C, 66356C, 66358C
Continued from preceding page.
Mnemonic
[Branch instructions]
BC addr Branch on CF
Instruction code
D7 D6 D5 D4 D3 D2 D1 D0
1101 1100
P7 P6 P5 P4 P3 P2 P1 P0 2
BNC
addr
Branch on no CF
1001 1100
P7 P6 P5 P4 P3 P2 P1 P0 2
BZ addr Branch on ZF
1101 1101
P7 P6 P5 P4 P3 P2 P1 P0 2
BNZ
addr
Branch on no ZF
1001 1101
P7 P6 P5 P4 P3 P2 P1 P0 2
BFn4
addr
Branch on flag bit
1 1 1 1 n3 n2 n1 n0 2
P7 P6 P5 P4 P3 P2 P1 P0
BNFn4 Branch on no flag bit 1 0 1 1 n3 n2 n1 n0 2
addr
P7 P6 P5 P4 P3 P2 P1 P0
[I/O instructions]
IP0
Input port 0 to AC
IP
Input port to AC
0010 0000 1
0010 0110 1
IPM
Input port to M
Input port to
IPDR i4 AC direct
IP45
Input port 4, 5 to
E, AC respectively
0001 1001 1
1100 1111
0 1 1 0 I3 I2 I1 I0 2
1100 1111 2
1101 0100
OP
Output AC to port 0 0 1 0 0 1 0 1 1
OPM Output M to port
0001 1010 1
Output AC to
OPDR i4 port direct
1100 1111
0 1 1 1 I3 I2 I1 I0 2
OP45
Output E, AC to port 1 1 0 0 1 1 1 1 2
4, 5 respectively
1101 0101
SPB t2 Set port bit
0 0 0 0 1 0 t1 t0 1
RPB t2 Reset port bit
0 0 1 0 1 0 t1 t0 1
ANDPDR And port with
1100 0101
i4, p4
immediate data then
output
I3 I2 I1 I0 P3 P2 P1 P0
2
ORPDR Or port with
1100 0100
i4, p4
immediate data then
output
I3 I2 I1 I0 P3 P2 P1 P0
2
Operation
Description
Affected
status
bits
PC7 to 0 ←
2
P7 P6 P5 P4
P3 P2 P1 P0
if (CF) = 1
PC7 to 0 ←
2
P7 P6 P5 P4
P3 P2 P1 P0
if (CF) = 0
PC7 to 0 ←
2
P7 P6 P5 P4
P3 P2 P1 P0
if (ZF) = 1
PC7 to 0 ←
2
P7 P6 P5 P4
P3 P2 P1 P0
if (ZF) = 0
PC7 to 0 ←
2
P7 P6 P5 P4
P3 P2 P1 P0
if (Fn) = 1
PC7 to 0 ←
2
P7 P6 P5 P4
P3 P2 P1 P0
if (Fn) = 0
Branch to the location in the
same page specified by P7 to
P0 if CF is one.
Branch to the location in the
same page specified by P7 to
P0 if CF is zero.
Branch to the location in the
same page specified by P7 to
P0 if ZF is one.
Branch to the location in the
same page specified by P7 to
P0 if ZF is zero.
Branch to the location in the
same page specified by P0 to
P7 if the flag (of the 16 user
flags) specified by n3 n2 n1 n0
is one.
Branch to the location in the
same page specified by P0 to
P7 if the flag (of the 16 user
flags) specified by n3 n2 n1 n0
is zero.
1 AC ← (P0)
Input the contents of port
0 to AC.
ZF
Input the contents of port
1 AC ← [P (DPL)]
P (DPL) to AC.
ZF
Input the contents of port
1 M (HL) ← [P (DPL)] P (DPL) to M (HL).
2 AC ← [P (i4)]
Input the contents of
P (i4) to AC.
ZF
2
E ← [P (4)]
AC ← [P (5)]
Input the contents of ports
P (4) and P (5) to E and AC
respectively.
1 P (DPL) ← (AC)
Output the contents of AC to
port P (DPL).
Output the contents of M (HL)
1 P (DPL) ← [M (HL)] to port P (DPL).
2 P (i4) ← (AC)
Output the contents of AC
to P (i4).
2 P (4) ← (E)
P (5) ← (AC)
Output the contents of E and
AC to ports P (4) and P (5)
respectively.
1 [P (DPL), t2] ← 1
1 [P (DPL), t2] ← 0
P (P3 to P0) ←
2 [P (P3 to P0)]
I3 to I0
P (P3 to P0) ←
2 [P (P3 to P0)]
I3 to I0
Set to one the bit in port
P (DPL) specified by the
immediate data t1 t0.
Clear to zero the bit in port
P (DPL) specified by the
ZF
immediate data t1 t0.
Take the logical AND of P (P3
to P0) and the immediate data
I3 I2 I1 I0 and output the result
ZF
to P (P3 to P0).
Take the logical OR of P (P3
to P0) and the immediate data ZF
I3 I2 I1 I0 and output the result
to P (P3 to P0).
Note
Continued on next page.
No. 5484-19/21
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