HMS91C7134K 데이터 시트보기 (PDF) - Hynix Semiconductor
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HMS91C7134K Datasheet PDF : 90 Pages
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HMS9xC7132 / HMS9xC7134
8.5 Addressing Mode
The addressing modes in HMS9xC7132 instruction set are as follows
• Direct addressing
• Register-specific addressing
• Indirect addressing
• Immediate constants addressing
• Register addressing
• Indexed addressing
Note that refer to “Chapter 22. Instruction Set” those addressing modes and related instructions.
(1) Direct addressing
In a direct addressing the operand is specified by an 8-bit address
field in the instruction. Only internal Data RAM and
SFRs(80~FFH RAM) can be directly addressed.
Example:
mov A, 3EH
; A RAM[3E]
PROG. MEMORY
3EH
04
→A
(2) Indirect addressing
In indirect addressing the instruction specifies a register which
contains the address of the operand. Both internal and external
RAM can be indirectly addressed. The address register for 8-bit
addresses can be R0 or R1 of the selected register bank, or the
Stack Pointer. The address register for 16-bit addresses can only
be the 16-bit “data pointer” register, DPTR.
Example:
mov @R1, 40H
;[R1] H]
PROG. MEMORY
40H
55
~~
~~
R1
55
(3) Register addressing
The register banks, containing registers R0 through R7, can be
accessed by certain instructions which carry a 3-bit register spec-
ification within the opcode of the instruction. Instructions that ac-
cess the registers this way are code efficient, since this mode
eliminates an address byte. When the instruction is executed, one
of four banks is selected at execution time by the two bank select
bits in the PSW.
Example;
mov PSW, #0001000B ; select Bank0
mov A, #30H
mov R1, A
(4) Register-specific addressing
Some instructions are specific to a certain register. For example,
some instructions always operate on the Accumulator, or Data
Pointer, etc., so no address byte is needed to point it. The opcode
itself does that.
22
May.2001 ver1.1
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