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MT48H16M16LFF-8 데이터 시트보기 (PDF) - Micron Technology

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MT48H16M16LFF-8
Micron
Micron Technology Micron
MT48H16M16LFF-8 Datasheet PDF : 58 Pages
First Prev 51 52 53 54 55 56 57 58
ADVANCE
256Mb: x16
MOBILE SDRAM
SINGLE WRITE – WITH AUTO PRECHARGE 1
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
CK
tCK
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP2
NOP2
NOP2
WRITE
NOP
NOP
NOP
ACTIVE
NOP
DQM/
DQML, DQMU
A0-A9, A11, A12
A10
BA0, BA1
tAS tAH
ROW
tAS tAH
ROW
tAS tAH
BANK
tCMS tCMH
COLUMN m 3
ENABLE AUTO PRECHARGE
BANK
ROW
ROW
BANK
DQ
tRCD
tRAS
tRC
tDS tDH
DIN m
tWR4
tRP
NOTE: 1. For this example, the burst length = 1.
2. Requires one clock plus time (5ns to 7ns) with auto precharge or 14ns to 15ns with PRECHARGE.
3. x16: A9, A11 and A12 = “Don’t Care”
4. WRITE command not allowed else tRAS would be violated.
DON’T CARE
TIMING PARAMETERS
SYMBOL*
tAH
tAS
tCH
tCL
tCK (3)
tCK (2)
tCK (1)
tCKH
tCKS
tCMH
-8
MIN MAX
1
2.5
3
3
8
10
20
1
2.5
1
-10
MIN MAX
1
2.5
3
3
10
12
25
1
2.5
1
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*CAS latency indicated in parentheses.
SYMBOL*
tCMS
tDH
tDS
tRAS
tRC
tRCD
tRP
tWR
-8
-10
MIN MAX MIN MAX UNITS
2.5
2.5
ns
1
1
ns
2.5
2.5
ns
48 120,000 50 120,000 ns
80
100
ns
20
20
ns
20
20
ns
1 CLK +
1 CLK +
7ns
5ns
256Mb: x16 Mobile SDRAM
MobileRamY26L_A.p65 – Pub. 5/02
53
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.

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