MT46H16M16 데이터 시트보기 (PDF) - Micron Technology
부품명
상세내역
제조사
MT46H16M16 Datasheet PDF : 79 Pages
| |||
256Mb: x16, x32 Mobile DDR SDRAM
Timing Diagrams
7. Refer to Figures 37 and 38 on pages 66–67 for DQS and DQ timing details.
Figure 47: Bank Write – Without Auto Precharge
T0
T1
T2
T3
T4 T4n T5 T5n T6
T7
T8
CK#
CK
tIS tIH
tCK
tCH tCL
CKE
tIS tIH
Command5
NOP6
ACT
NOP6
WRITE2
NOP6
NOP6
NOP6
NOP6
PRE
tIS tIH
A0–A9
RA
Col n
A11, A12
A10
BA0, BA1
DQS
DQ1
DM
RA
RA
tIS tIH
Bank x
tRCD
tIS tIH
3
Bank x
tDQSS(NOM)
tRAS
tWPRES tWPRE
DOUT
b
tDQSL tDQSH tWPST
tWR
All banks
One bank
Bank x4
tRP
tDS
tDH
Transitioning data
Don’t Care
Notes:
1. DIN n = data-in from column n; subsequent elements are provided in the programmed
order.
2. BL = 4 in the case shown.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T5.
5. PRE = PRECHARGE; ACT = ACTIVE; RA = row address; BA = bank address.
6. NOP commands are shown for ease of illustration; other commands may be valid at these
times.
7. tDSH is applicable during tDQSS (MIN) and is referenced from CK T4 or T5.
8. tDSS is applicable during tDQSS (MIN) and is referenced from CK T5 or T6.
PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 6/08 EN
75
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2005 Micron Technology, Inc. All rights reserved.
Share Link: 