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MT46H16M16 데이터 시트보기 (PDF) - Micron Technology

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MT46H16M16
Micron
Micron Technology Micron
MT46H16M16 Datasheet PDF : 79 Pages
First Prev 71 72 73 74 75 76 77 78 79
256Mb: x16, x32 Mobile DDR SDRAM
Timing Diagrams
Figure 49: Write – DM Operation
CK#
CK
CKE
Command5
T0
tIS tIH
tIS tIH
NOP6
A0–A9
T1
tCK
T2
T3
tCH tCL
ACT
tIS tIH
RA
NOP6
WRITE2
Col n
T4 T4n T5 T5n T6
NOP6
NOP6
NOP6
T7
NOP6
A11, A12
A10
BA0, BA1
DQS
DQ1
DM
RA
RA
tIS tIH
Bank x
tRCD
tRAS
tIS tIH
3
Bank x
tDQSS (NOM)
tWPRES tWPRE
DOUT
b
tDQSL tDQSH tWPST
tWR
tDS
tDH
Transitioning data
T8
PRE
All banks
One bank
Bank x4
tRP
Dont Care
Notes:
1. DIN n = data-in from column n; subsequent elements are provided in the programmed
order.
2. BL = 4 in the case shown.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T5.
5. PRE = PRECHARGE; ACT = ACTIVE; RA = row address; BA = bank address.
6. NOP commands are shown for ease of illustration; other commands may be valid at these
times.
7. tDSH is applicable during tDQSS (MIN) and is referenced from CK T4 or T5.
8. tDSS is applicable during tDQSS (MIN) and is referenced from CK T5 or T6.
PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 6/08 EN
77
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2005 Micron Technology, Inc. All rights reserved.

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