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MT48H16M16LFF-8 데이터 시트보기 (PDF) - Micron Technology

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MT48H16M16LFF-8
Micron
Micron Technology Micron
MT48H16M16LFF-8 Datasheet PDF : 58 Pages
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Operation
BANK/ROW ACTIVATION
Before any READ or WRITE commands can be is-
sued to a bank within the SDRAM, a row in that bank
must be “opened.” This is accomplished via the AC-
TIVE command, which selects both the bank and the
row to be activated (see Figure 3).
After opening a row (issuing an ACTIVE command),
a READ or WRITE command may be issued to that row,
subject to the tRCD specification. tRCD (MIN) should
be divided by the clock period and rounded up to the
next whole number to determine the earliest clock edge
after the ACTIVE command on which a READ or WRITE
command can be entered. For example, a tRCD specifi-
cation of 20ns with a 125 MHz clock (8ns period) results
in 2.5 clocks, rounded to 3. This is reflected in Figure 4,
which covers any case where 2 < tRCD (MIN)/tCK 3.
(The same procedure is used to convert other specifi-
cation limits from time units to clock cycles.)
A subsequent ACTIVE command to a different row
in the same bank can only be issued after the previous
active row has been “closed” (precharged). The mini-
mum time interval between successive ACTIVE com-
mands to the same bank is defined by tRC.
A subsequent ACTIVE command to another bank
can be issued while the first bank is being accessed,
which results in a reduction of total row-access over-
head. The minimum time interval between successive
ACTIVE commands to different banks is defined by
tRRD.
ADVANCE
256Mb: x16
MOBILE SDRAM
Figure 3
Activating a Specific Row in a
Specific Bank
CLK
CKE HIGH
CS#
RAS#
CAS#
WE#
A0-A12
ROW
ADDRESS
BA0, BA1
BANK
ADDRESS
DON’T CARE
Figure 4
Example: Meeting tRCD (MIN) When 2 < tRCD (MIN)/tCK < 3
T0
T1
T2
T3
T4
CLK
COMMAND
ACTIVE
NOP
NOP
READ or
WRITE
tRCD
DON’T CARE
256Mb: x16 Mobile SDRAM
MobileRamY26L_A.p65 – Pub. 5/02
14
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.

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