T0
CLK
Figure 8
Random READ Accesses
T1
T2
T3
T4
ADVANCE
256Mb: x16
MOBILE SDRAM
COMMAND
READ
READ
READ
READ
NOP
ADDRESS
BANK,
COL n
BANK,
COL a
BANK,
COL x
BANK,
COL m
DQ
DOUT
n
CAS Latency = 1
DOUT
a
DOUT
x
DOUT
m
T0
T1
T2
T3
CLK
T4
T5
COMMAND
READ
READ
READ
READ
NOP
NOP
ADDRESS
BANK,
COL n
BANK,
COL a
BANK,
COL x
BANK,
COL m
DQ
DOUT
n
DOUT
a
DOUT
x
CAS Latency = 2
DOUT
m
T0
T1
T2
T3
T4
T5
T6
CLK
COMMAND
READ
READ
READ
READ
NOP
NOP
NOP
ADDRESS
BANK,
COL n
BANK,
COL a
BANK,
COL x
BANK,
COL m
DQ
DOUT
n
DOUT
a
CAS Latency = 3
NOTE: Each READ command may be to either bank. DQM is LOW.
DOUT
x
DOUT
m
DON’T CARE
256Mb: x16 Mobile SDRAM
MobileRamY26L_A.p65 – Pub. 5/02
17
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.